@phdthesis{susplugas:pastel-00000619, TITLE = {{Applications of Delay Locked Loop in frequency synthesizers in analogue circuit.}}, AUTHOR = {Susplugas, Olivier}, URL = {https://pastel.hal.science/pastel-00000619}, SCHOOL = {{T{\'e}l{\'e}com ParisTech}}, YEAR = {2003}, MONTH = Jun, KEYWORDS = {''Moblie communication'' ; ''frequency synthetizer'' ; ''delay locked loop'' ; ''phase noise'' ; ''jitter'' ; ''communication mobile'' ; ''synth{\`e}se de fr{\'e}quences'' ; ''boucle {\`a} verrouillage de d{\'e}lais'' ; ''bruit de phase'' ; ''gigue''}, TYPE = {Theses}, PDF = {https://pastel.hal.science/pastel-00000619/file/Manuscript.pdf}, HAL_ID = {pastel-00000619}, HAL_VERSION = {v1}, }